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1 : : /*
2 : : * arch/arm/kernel/topology.c
3 : : *
4 : : * Copyright (C) 2011 Linaro Limited.
5 : : * Written by: Vincent Guittot
6 : : *
7 : : * based on arch/sh/kernel/topology.c
8 : : *
9 : : * This file is subject to the terms and conditions of the GNU General Public
10 : : * License. See the file "COPYING" in the main directory of this archive
11 : : * for more details.
12 : : */
13 : :
14 : : #include <linux/cpu.h>
15 : : #include <linux/cpumask.h>
16 : : #include <linux/export.h>
17 : : #include <linux/init.h>
18 : : #include <linux/percpu.h>
19 : : #include <linux/node.h>
20 : : #include <linux/nodemask.h>
21 : : #include <linux/of.h>
22 : : #include <linux/sched.h>
23 : : #include <linux/slab.h>
24 : :
25 : : #include <asm/cputype.h>
26 : : #include <asm/topology.h>
27 : :
28 : : /*
29 : : * cpu power scale management
30 : : */
31 : :
32 : : /*
33 : : * cpu power table
34 : : * This per cpu data structure describes the relative capacity of each core.
35 : : * On a heteregenous system, cores don't have the same computation capacity
36 : : * and we reflect that difference in the cpu_power field so the scheduler can
37 : : * take this difference into account during load balance. A per cpu structure
38 : : * is preferred because each CPU updates its own cpu_power field during the
39 : : * load balance except for idle cores. One idle core is selected to run the
40 : : * rebalance_domains for all idle cores and the cpu_power can be updated
41 : : * during this sequence.
42 : : */
43 : : static DEFINE_PER_CPU(unsigned long, cpu_scale);
44 : :
45 : 0 : unsigned long arch_scale_freq_power(struct sched_domain *sd, int cpu)
46 : : {
47 : 2574968 : return per_cpu(cpu_scale, cpu);
48 : : }
49 : :
50 : : static void set_power_scale(unsigned int cpu, unsigned long power)
51 : : {
52 : 0 : per_cpu(cpu_scale, cpu) = power;
53 : : }
54 : :
55 : : #ifdef CONFIG_OF
56 : : struct cpu_efficiency {
57 : : const char *compatible;
58 : : unsigned long efficiency;
59 : : };
60 : :
61 : : /*
62 : : * Table of relative efficiency of each processors
63 : : * The efficiency value must fit in 20bit and the final
64 : : * cpu_scale value must be in the range
65 : : * 0 < cpu_scale < 3*SCHED_POWER_SCALE/2
66 : : * in order to return at most 1 when DIV_ROUND_CLOSEST
67 : : * is used to compute the capacity of a CPU.
68 : : * Processors that are not defined in the table,
69 : : * use the default SCHED_POWER_SCALE value for cpu_scale.
70 : : */
71 : : static const struct cpu_efficiency table_efficiency[] = {
72 : : {"arm,cortex-a15", 3891},
73 : : {"arm,cortex-a7", 2048},
74 : : {NULL, },
75 : : };
76 : :
77 : : static unsigned long *__cpu_capacity;
78 : : #define cpu_capacity(cpu) __cpu_capacity[cpu]
79 : :
80 : : static unsigned long middle_capacity = 1;
81 : :
82 : : /*
83 : : * Iterate all CPUs' descriptor in DT and compute the efficiency
84 : : * (as per table_efficiency). Also calculate a middle efficiency
85 : : * as close as possible to (max{eff_i} - min{eff_i}) / 2
86 : : * This is later used to scale the cpu_power field such that an
87 : : * 'average' CPU is of middle power. Also see the comments near
88 : : * table_efficiency[] and update_cpu_power().
89 : : */
90 : 0 : static void __init parse_dt_topology(void)
91 : : {
92 : : const struct cpu_efficiency *cpu_eff;
93 : : struct device_node *cn = NULL;
94 : : unsigned long min_capacity = (unsigned long)(-1);
95 : : unsigned long max_capacity = 0;
96 : : unsigned long capacity = 0;
97 : : int alloc_size, cpu = 0;
98 : :
99 : 0 : alloc_size = nr_cpu_ids * sizeof(*__cpu_capacity);
100 : 0 : __cpu_capacity = kzalloc(alloc_size, GFP_NOWAIT);
101 : :
102 [ # # ]: 0 : for_each_possible_cpu(cpu) {
103 : 0 : const u32 *rate;
104 : : int len;
105 : :
106 : : /* too early to use cpu->of_node */
107 : 0 : cn = of_get_cpu_node(cpu, NULL);
108 [ # # ]: 0 : if (!cn) {
109 : 0 : pr_err("missing device node for CPU %d\n", cpu);
110 : 0 : continue;
111 : : }
112 : :
113 [ # # ]: 0 : for (cpu_eff = table_efficiency; cpu_eff->compatible; cpu_eff++)
114 [ # # ]: 0 : if (of_device_is_compatible(cn, cpu_eff->compatible))
115 : : break;
116 : :
117 [ # # ]: 0 : if (cpu_eff->compatible == NULL)
118 : 0 : continue;
119 : :
120 : 0 : rate = of_get_property(cn, "clock-frequency", &len);
121 [ # # ][ # # ]: 0 : if (!rate || len != 4) {
122 : 0 : pr_err("%s missing clock-frequency property\n",
123 : : cn->full_name);
124 : 0 : continue;
125 : : }
126 : :
127 : 0 : capacity = ((be32_to_cpup(rate)) >> 20) * cpu_eff->efficiency;
128 : :
129 : : /* Save min capacity of the system */
130 [ # # ]: 0 : if (capacity < min_capacity)
131 : : min_capacity = capacity;
132 : :
133 : : /* Save max capacity of the system */
134 [ # # ]: 0 : if (capacity > max_capacity)
135 : : max_capacity = capacity;
136 : :
137 : 0 : cpu_capacity(cpu) = capacity;
138 : : }
139 : :
140 : : /* If min and max capacities are equals, we bypass the update of the
141 : : * cpu_scale because all CPUs have the same capacity. Otherwise, we
142 : : * compute a middle_capacity factor that will ensure that the capacity
143 : : * of an 'average' CPU of the system will be as close as possible to
144 : : * SCHED_POWER_SCALE, which is the default value, but with the
145 : : * constraint explained near table_efficiency[].
146 : : */
147 [ # # ]: 0 : if (4*max_capacity < (3*(max_capacity + min_capacity)))
148 : 0 : middle_capacity = (min_capacity + max_capacity)
149 : 0 : >> (SCHED_POWER_SHIFT+1);
150 : : else
151 : 0 : middle_capacity = ((max_capacity / 3)
152 : 0 : >> (SCHED_POWER_SHIFT-1)) + 1;
153 : :
154 : 0 : }
155 : :
156 : : /*
157 : : * Look for a customed capacity of a CPU in the cpu_capacity table during the
158 : : * boot. The update of all CPUs is in O(n^2) for heteregeneous system but the
159 : : * function returns directly for SMP system.
160 : : */
161 : 0 : static void update_cpu_power(unsigned int cpu)
162 : : {
163 [ # # ]: 0 : if (!cpu_capacity(cpu))
164 : 0 : return;
165 : :
166 : 0 : set_power_scale(cpu, cpu_capacity(cpu) / middle_capacity);
167 : :
168 : 0 : printk(KERN_INFO "CPU%u: update cpu_power %lu\n",
169 : : cpu, arch_scale_freq_power(NULL, cpu));
170 : : }
171 : :
172 : : #else
173 : : static inline void parse_dt_topology(void) {}
174 : : static inline void update_cpu_power(unsigned int cpuid) {}
175 : : #endif
176 : :
177 : : /*
178 : : * cpu topology table
179 : : */
180 : : struct cputopo_arm cpu_topology[NR_CPUS];
181 : : EXPORT_SYMBOL_GPL(cpu_topology);
182 : :
183 : 0 : const struct cpumask *cpu_coregroup_mask(int cpu)
184 : : {
185 : 701 : return &cpu_topology[cpu].core_sibling;
186 : : }
187 : :
188 : 0 : static void update_siblings_masks(unsigned int cpuid)
189 : : {
190 : 0 : struct cputopo_arm *cpu_topo, *cpuid_topo = &cpu_topology[cpuid];
191 : : int cpu;
192 : :
193 : : /* update core and thread sibling masks */
194 [ # # ]: 0 : for_each_possible_cpu(cpu) {
195 : 0 : cpu_topo = &cpu_topology[cpu];
196 : :
197 [ # # ]: 0 : if (cpuid_topo->socket_id != cpu_topo->socket_id)
198 : 0 : continue;
199 : :
200 : : cpumask_set_cpu(cpuid, &cpu_topo->core_sibling);
201 [ # # ]: 0 : if (cpu != cpuid)
202 : : cpumask_set_cpu(cpu, &cpuid_topo->core_sibling);
203 : :
204 [ # # ]: 0 : if (cpuid_topo->core_id != cpu_topo->core_id)
205 : 0 : continue;
206 : :
207 : : cpumask_set_cpu(cpuid, &cpu_topo->thread_sibling);
208 [ # # ]: 0 : if (cpu != cpuid)
209 : : cpumask_set_cpu(cpu, &cpuid_topo->thread_sibling);
210 : : }
211 : 0 : smp_wmb();
212 : 0 : }
213 : :
214 : : /*
215 : : * store_cpu_topology is called at boot when only one cpu is running
216 : : * and with the mutex cpu_hotplug.lock locked, when several cpus have booted,
217 : : * which prevents simultaneous write access to cpu_topology array
218 : : */
219 : 0 : void store_cpu_topology(unsigned int cpuid)
220 : : {
221 : 81 : struct cputopo_arm *cpuid_topo = &cpu_topology[cpuid];
222 : : unsigned int mpidr;
223 : :
224 : : /* If the cpu topology has been already set, just return */
225 [ + - ]: 81 : if (cpuid_topo->core_id != -1)
226 : 0 : return;
227 : :
228 : : mpidr = read_cpuid_mpidr();
229 : :
230 : : /* create cpu topology mapping */
231 [ # # ]: 81 : if ((mpidr & MPIDR_SMP_BITMASK) == MPIDR_SMP_VALUE) {
232 : : /*
233 : : * This is a multiprocessor system
234 : : * multiprocessor format & multiprocessor mode field are set
235 : : */
236 : :
237 [ # # ]: 0 : if (mpidr & MPIDR_MT_BITMASK) {
238 : : /* core performance interdependency */
239 : 0 : cpuid_topo->thread_id = MPIDR_AFFINITY_LEVEL(mpidr, 0);
240 : 0 : cpuid_topo->core_id = MPIDR_AFFINITY_LEVEL(mpidr, 1);
241 : 0 : cpuid_topo->socket_id = MPIDR_AFFINITY_LEVEL(mpidr, 2);
242 : : } else {
243 : : /* largely independent cores */
244 : 0 : cpuid_topo->thread_id = -1;
245 : 0 : cpuid_topo->core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0);
246 : 0 : cpuid_topo->socket_id = MPIDR_AFFINITY_LEVEL(mpidr, 1);
247 : : }
248 : : } else {
249 : : /*
250 : : * This is an uniprocessor system
251 : : * we are in multiprocessor format but uniprocessor system
252 : : * or in the old uniprocessor format
253 : : */
254 : 0 : cpuid_topo->thread_id = -1;
255 : 0 : cpuid_topo->core_id = 0;
256 : 0 : cpuid_topo->socket_id = -1;
257 : : }
258 : :
259 : 0 : update_siblings_masks(cpuid);
260 : :
261 : 0 : update_cpu_power(cpuid);
262 : :
263 : 0 : printk(KERN_INFO "CPU%u: thread %d, cpu %d, socket %d, mpidr %x\n",
264 : : cpuid, cpu_topology[cpuid].thread_id,
265 : : cpu_topology[cpuid].core_id,
266 : : cpu_topology[cpuid].socket_id, mpidr);
267 : : }
268 : :
269 : : /*
270 : : * cluster_to_logical_mask - return cpu logical mask of CPUs in a cluster
271 : : * @socket_id: cluster HW identifier
272 : : * @cluster_mask: the cpumask location to be initialized, modified by the
273 : : * function only if return value == 0
274 : : *
275 : : * Return:
276 : : *
277 : : * 0 on success
278 : : * -EINVAL if cluster_mask is NULL or there is no record matching socket_id
279 : : */
280 : 0 : int cluster_to_logical_mask(unsigned int socket_id, cpumask_t *cluster_mask)
281 : : {
282 : : int cpu;
283 : :
284 [ # # ]: 0 : if (!cluster_mask)
285 : : return -EINVAL;
286 : :
287 [ # # ]: 0 : for_each_online_cpu(cpu)
288 [ # # ]: 0 : if (socket_id == topology_physical_package_id(cpu)) {
289 : 0 : cpumask_copy(cluster_mask, topology_core_cpumask(cpu));
290 : 0 : return 0;
291 : : }
292 : :
293 : : return -EINVAL;
294 : : }
295 : :
296 : : /*
297 : : * init_cpu_topology is called at boot when only one cpu is running
298 : : * which prevent simultaneous write access to cpu_topology array
299 : : */
300 : 0 : void __init init_cpu_topology(void)
301 : : {
302 : : unsigned int cpu;
303 : :
304 : : /* init core mask and power*/
305 [ # # ]: 0 : for_each_possible_cpu(cpu) {
306 : 0 : struct cputopo_arm *cpu_topo = &(cpu_topology[cpu]);
307 : :
308 : 0 : cpu_topo->thread_id = -1;
309 : 0 : cpu_topo->core_id = -1;
310 : 0 : cpu_topo->socket_id = -1;
311 : : cpumask_clear(&cpu_topo->core_sibling);
312 : : cpumask_clear(&cpu_topo->thread_sibling);
313 : :
314 : : set_power_scale(cpu, SCHED_POWER_SCALE);
315 : : }
316 : 0 : smp_wmb();
317 : :
318 : 0 : parse_dt_topology();
319 : 0 : }
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