Date: Wed, 17 Jan 1996 16:44:10 -0600 From: kingman@austin.ibm.com (John Kingman) Subject: Item #306: Power PC Binding Update notes P1275 Open Firmware Working Group Proposal -- Proposal #306 Ver Title: PowerPC processor binding update Author: John A. Kingman Date: January 17, 1996 Ed/Tech: Technical Synopsis: Incorporate updates resulting from various reviews Doc & Version: PowerPC processor Binding 1.6 DRAFT Problem: Current binding needs to be updated to reflect support for 64-bit and other optional implementations as well as other editorial and structural changes resulting from reviews relating to the Common Hardware Reference Platform (CHRP). Proposal: Key: E -- editorial change P -- move to platform (PReP/CHRP) binding C -- resulting from CHRP review 6 -- 64/32 bit support S -- clarification K Pg Lines Description of change - -- ----- --------------------------------------------------------------- P 7 14-19 remove to platform bindings. E 31 insert "Morgan Kaufmann Publishers, Inc. (ISBN 1-55960-316-6). Also available from" before "IBM" P 32-39 remove to platform bindings; The data format of the client program is the domain of the platform binding. P 47-49 remove; ditto E 8 7 delete "(i.e., hardware)" 6 14 insert definitions for "segmented address translation", "block address translation" and "processor-bus" P 16-46 remove to platform bindings; requirements for bi-endian support and for bi-endian booting are more appropriately addressed in the platform bindings. E 9 8 change "Addressing" to "Memory Management" 6 18 delete "and the 32-bit processor model is assumed" E 26 change "firmware" to "Open Firmware" E 27 change "HTAB" to "Segmented Address" 6 29 change "32" to "64{32}" and "52" to "80{52}" 6 30 change "24" to "52{24}", replace the semicolon with a period, and insert "On 32-bit implementations," 6 31 Insert "On 64-bit implementations, the VSID is looked up in a Segment Table using the 36 MSbs of the EA." before line 32. 6 33 change "39" to "67{39}" 6 34 change "bits 40-51" to "12 LSbs" 6 40 Insert before "On most PowerPC..." the following: "64-bit implementations may also implement a Segment Lookaside Buffer (SLB) for the same reasons." E 49 change "BAT" to "Block Address" E 53 change "registers" to "entries" S 10 2 add after period "BAT areas are restricted to a finite set of allowable lengths, all of which are powers of 2. The smallest BAT area defined is 128 KB (2^17 bytes). The largest BAT area defined is 256 MB (2^28 bytes). The starting address of a BAT area in both EA space and RA space must be a multiple of the area's length." E 3 change "my" to "by" and "some" to "a" E 4 change "registers" to "entries" E 7 change "BAT" to "Block Address Translation" and "HTAB" to "Segmented Address Translation" E 8 change "register" to "entry" and "the HTAB" to "a Page Table Entry or HTAB" P 14 change "section 9.1.1" to "the applicable platform binding" P 16 delete "the header of" P 17 delete "in the header" P 18-19 change "found in the client's header" to "of the client" E 43 delete first sentence S 44 add "(when real-mode? is true)" after "Real-Mode", delete "considered", end the sentence at "independent" and add "Either they do not use translation, or their translations are private" before the semicolon E 45 change "addresses with the RA" to "real address" E 47 change "RAs" to "real addresses" E 49 change "RA" to "real address" E 11 1 delete "should" E 2 change "The" to "In Real-Mode the" E 18 change "HTAB" to "Page Tables" E 25+ delete "virt~real" and add "in which virtual addresses do not equal real addresses" after "translations" E 30 change "target" to "client" C 40+ delete "the DSI/ISI" C 44+ add "and call the handler from only one CPU at a time" to the end of the sentence 6 12 10 change "HTAB" to "Page Tables" 6 11 delete "to the HTAB" 6 39 add "segment table," after "segment registers" C 44 change both occurrences of "shall" to "should" C 13 1 change "there shall be a callback service provided by the client" to "the client must provide a callback service" P 8-28 remove to platform bindings; The common system bus is the domain of the platform binding. E 46+ change "iinterupt" to "interrupt" S 49+ add "The "cpus" node shall not have "reg" or "ranges" properties." to the paragraph S 14 17-18 change "XXX" to "" and add ", the name of the processor chip which may be displayed to the user." E 27 add "the number of" after "shall be" E 34+ change "value as" to "shall be the value" E 42 change "incremented" to "are updated" S 44+ add "(1 x 10^9)" after "billion" C 15 11 insert the following after this line "cpu-state" Standard property, encoded as with encode-string, that represents the processor state. The values of this property are either "running", "idle", or "stopped." "bus-frequency" Standard property, encoded as with encode-int, that represents the speed (in hertz) of this processor's bus. "32-64-bridge" prop-encoded-array: This property, if present, indicates that the PowerPC microprocessor defined by this CPU node implements the "Bridge Facilities and Instructions for 64-bit Implementations" as described in an appendix of Book III of [2]. The absence of this property indicates that the PowerPC microprocessor defined by this CPU node does not support these facilities and instructions. "emulation-assist-unit" prop-encoded-array: This property, if present, indicates that the PowerPC microprocessor defined by this CPU node implements the emulation assist unit (EAU). The absence of this property indicates that the PowerPC microprocessor defined by this CPU node does not implement the EAU. "external-control" prop-encoded-array: This property, if present, indicates that the PowerPC microprocessor defined by this CPU node implements the External Control Facility as described in the "Optional Facilitites and Instructions" appendix of Book II of [2]. The absence of his property indicates that the PowerPC microprocessor defined by this CPU node does not support the External Control Facility. "general-purpose" prop-encoded-array: This property, if present, indicates that the PowerPC microprocessor defined by this CPU node implements the floating point instructions fsqrt and fsqrts. The absence of this property indicates that the PowerPC microprocessor defined by this CPU node does not support the floating point instructions fsqrt and fsqrts. "reservation-granule-size" Standard property, encoded as with encode-int, that represents the reservation granule size (i.e., the minimum size of lock variables) supported by this processor, in bytes. "graphics" prop-encoded-array: This property, if present, indicates that the PowerPC microprocessor defined by this CPU node implements the floating point instructions stfiwx, fres, frsqrte, and fsel. The absence of this property indicates that the PowerPC microprocessor defined by this CPU node does not support the floating point instructions stfiwx, fres, frsqrte, and fsel. "performance-monitor" prop-encoded-array: This property, if present, indicates that the PowerPC microprocessor defined by this CPU node implements the performance monitor functionality. The absence of this property indicates that the PowerPC microprocessor defined by this CPU node does not support this performance monitor functionality. "tlbia" prop-encoded-array: This property, if present, indicates that the PowerPC microprocessor defined by this CPU node implements the tlbia insruction. The absence of this property indicates that the PowerPC microprocessor defined by this CPU node does not support the tlbia insruction. C 16 1 change "another" to "the next" C 4 change "L2" to "next level" E 18 change "External" to "Ancillary" E 19+ change "external (L2)" to "secondary (L2) or tertiary (L3), etc." and "internal" to "L1" E 23-26 change all "L2" to "ancillary" E 28-29 delete "it is" through "caches." E 33 change "L2-cache" to "ancillary cache" E 36 change "L2 caches" to "caches at this node" E 39 delete "L2" E 40 add "at this node" after "cache" E 42+ delete "L2" E 43+ add "at this node" after "cache" E 46 delete "L2" E 47 add "at this node" after "cache" E 50 delete "L2" E 51 add "at this node" after "cache" E 17 1 change "another" to "the next" P 18 22 through 20 45 remove to platform bindings; The data format of the client program is the domain of the platform binding. E 20 49 delete first sentence and add "(see Section 11, Configuration Variables)" following "load-base" P 21 25+ add "for platform binding" after "reserved" P 26+ add "for platform binding" after "reserved" P 44+ change "Section 5.6 of the PR*P specification" to "relevant sections of the platform binding" S 22 34+ change "do" to "Open Firmware does" E 47 change "6.3.2.6" to "6.3.2" E 23 3+ change "must" to "shall" S 26 1-30 delete "State" from each bubble S 35 insert the following Note: Open Firmware's memory cannot be reclaimed by a client if a CPU is in the "stopped" or "idle" state. S 39 change "interfaces" to "services" E 44-46 delete E 26 47 through 27 40 reformat to be consistent with other Client Interface Services descriptions E 27 26 change "rational" to "rationale" John Kingman (kingman@austin.ibm.com) [ P1275 Item #306 -- Received: Wed Jan 17 14:42:28 PST 1996 ]